1 BCM datasheet errata. the BCM Broadcom specifies the reserved bits the other way around: “Write zeroes, read: don’t care”. Read about ‘Broadcom: Datasheet for BCM ARM Peripherals’ on element14 .com. Broadcom: Datasheet for BCM ARM Peripherals. If you have been following Raspberry Pi project, you may have noticed the dearth of documentation related to Broadcom processors.

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Raspberry Pi Releases BCM Datasheet for ARM Peripherals

Broadcom specifies the reserved bits the other way around: If 0 the receiver shift register is cleared before each transaction. In table the values in columns “min output freq” and “max output freq” should be in each others. There is a datasheeet in ” full ” that would hint at that the word “half” was taken away.

Privacy policy About eLinux. Therefore, the aim of this small test application project is to:. Link to it via two brroadcom blocks on the primary chain.

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Views Read View source View history. I assume you want the cleanest clock source which is the XTAL However the exact speed of the APB clock is never explained. Two bits high would be consistent with TX empty and RX empty. Possibly the “choice” hasn’t been specified. The “description” is then SPI That is the values in column datasheett output freq” are the maximum output frequency values and the values in column “max output freq” are bcmm2835 minimum output frequency values [check: Not really an erratum, but not worth it to make a whole page for this.

BCM Datasheet(PDF) – Broadcom Corporation.

I dunno the official answer to this, but the community-written SPI drivers here and here set them both at the same time. This is not true. This page was last edited on 9 Julyat A detailed analysis of this bug can be found at http: The CDIV value is documented as “must be a power of 2”. The table, legend for tablestarted on page shows twice in red: The bottom bit doesn’t work as per specifications, and because the “0” results inthe top bit doesn’t either.


Many datasheets specify “write: I strongly suspect that the CDIV counter is only 14 bits wide. This had lead to a confusing picture.

This is the correct way to do it. The divider is split between an integer divider and a fractional mashing datasjeet. You must write the MS 8 bits as 0x5A. The way it is written now, this bit is just the same as bit RXF, except that the TA bit is anded into this one.

BCM2835 datasheet errata

And by specifying “read: The I2C section on page 34 mentions MHz as a “nominal core clock”. I think- not confirmed.

Allusions to the APB clock domain are made. The quality of the datasheet is high. This shows a bit pattern of as alternative function 3. Retrieved from ” https: